EEPROM (Electrically Erasable and Programmable ROM) which can be erased electrically is one of various types of semiconductor memory device currently known in the art. This type of device is fabricated by first forming a silicon oxide film on a semiconductor substrate, then forming one or more silicon nitride films thereon, followed by the formation of a silicon oxide film, and finally forming a control gate electrode on the thus layered structure (for example, Japanese Unexamined Patent Publication No. 2002-203917 (U.S. Pat. Nos. 6,906,390 and 7,259,433), hereinafter referred to as patent document 1). In EEPROM, data “1” or “0” is written by applying a voltage between the semiconductor substrate and the control gate electrode and by storing electrons or holes primarily in the silicon nitride film or at the interface between the silicon nitride film and the upper or lower silicon oxide film in the layered structure of the insulating films (the insulating film stack structure).
The prior art will be described below by taking as an example a case where electrons are injected into the insulating film stack structure, which acts as the charge storing region. First, 0 V is applied to the semiconductor substrate, and a positive voltage, for example, 10 V, is applied to the control gate electrode. This means that a strong electric field is applied across the insulating film stack structure sandwiched between the semiconductor substrate and the control gate electrode, and electrons are injected from the semiconductor substrate into the silicon nitride film via the lower silicon oxide film by the tunnel effect. The injected electrons are trapped primarily in the silicon nitride film at or near the interface between the silicon nitride film and the lower silicon oxide film or upper silicon oxide film, and are stored as data.
An important factor for determining the performance of a nonvolatile semiconductor memory device such as EEPROM is the data retention. In the prior art regarding an MOS semiconductor memory device, if the electrons trapped in the silicon nitride film at or near the interface between the silicon nitride film and the lower silicon oxide film or upper silicon oxide film are to be retained stably over a long period of time, the thicknesses of the upper and lower silicon oxide films have had to be increased. However, there has been a problem that if the thicknesses of the upper and lower silicon oxide films are increased, the electric field applied across the insulating film stack structure to write data becomes weaker, slowing the data writing speed.
The above problem could be solved by increasing the electric field applied across the insulating film stack structure, but this would require increasing the data write voltage. However, not only the power consumption of the semiconductor memory device but the probability of the dielectric breakdown of the insulting films would also increase, resulting in the reliability of the semiconductor memory device greatly dropping.